CVC - High Performance Verilog Simulator
Pragmatic C's flagship product is the CVC Verilog Hardware Description
Language simulator. CVC is a fast compiled Verilog simulator that
implements the IEEE 1364-2005 Verilog HDL Standard. CVC is a valuable yet
cost efficient tool to add to your existing IC design flow.
By implementing industry standard IEEE 1364-2005 Verilog, CVC can
seamlessly replace or augment any other commercial Verilog simulator in your
design flow. You can purchase cost effective CVC to cut your logic design
costs, or to increase your overnight regression test capabilities or to
provide desktop/notebook Verilog for additional engineers.
Fast Compiled Simulation
CVC is a high performance Verilog HDL compiled simulator.
Compiled CVC simulates up to 50 times faster than CVC run in
interpreted mode making it one of the fastest simulators on the
market.
CVC Verilog Simulator Benchmarks
Visit our
Verilog benchmarks page
to view CVC's simulation times for various Verilog designs.
The
benchmark page
also contains Verilog souce for the benchmarks and instructions
for downloading and simulating the designs.
Interpreted/Compiled Modes
CVC's ability to run in either interpreted or compiled mode sets it apart
from the competition. When doing initial design, CVC offers the fastest
design elaboration of any Verilog simulator allowing for elaboration of even
the most complex designs in only a few seconds. When doing exhaustive
design testing, CVC's fast simulation speed allows more comprehensive
testing. When run in interpreted mode, CVC allows debugging designs
using a gdb style programmable integrated debugger.
Comparisons of CVC in
compiled mode versus interpreted mode can be viewed
here.
Multiple Debugging Methods
CVC allows designs to choose their favorite debugging style. For those
who prefer the programmable gdb style, CVC provides
a interactive debug environment entered using the $stop command.
Once interactive mode is entered, CVC in interpreted mode offers many of the
GDB commands including:
online help, statement breakpoints, edge break points, design hierarchy,
moving and viewing. All break point commands allow conditions to filter
specific instances or types.
For designers, who prefer the waveform debugging style, CVC supports
VCD, extended VCD, and Novas' fsdb format.
Discovery CVC's capabilities for yourself by signing up for an
evaluation today.
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