Pragmatic C Software - CVC Compiled Verilog

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CVC Compiled Verilog

CVC is a native X86 Linux compiler and is many times faster than the Cver interpreter. CVC simulates 2 to 50 times faster than interepreted Cver. Current speed comparions to Cver may be viewed here. We are continually improving the speed of CVC with each release.

Our new CVC Verilog compiler produces the same results as interpreted Cver. It is now available for evaluation and purchase. If you are interested in obtaining an evaluation license for CVC please sign up here. Please contact us if you have any questions.

CVC's ability to run in either compiled or interpreted mode provides a very efficient verification environment. It's fast elaboration algorithm and gdb style debugger allows debugging new changes quickly and the compiled mode allows running longer regression tests when performance is critical. CVC running in interpreted mode also shows speed improvements over the slower Cver interpreter.

Once hardware design is complete, the ability to simulate as many regression tests as possible becomes important. The CVC compiler can then be run to produce a library that can be repeatedly run on different regression tests.